Product Summary
The BS62LV256SIP70 is a high performance, very low power CMOS Static Random Access Memory organized as 32,768 by 8 bits and operates form a wide range of 2.4V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with typical CMOS standby current of 0.01uA and maximum access time of 70ns in 3.0V operation. Easy memory expansion is provided by an active LOW chip enable (CE), and active LOW output enable (OE) and three-state output drivers. The BS62LV256SIP70 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS62LV256SIP70 is available in DICE form, JEDEC standard 28 pin 330mil Plastic SOP, 600mil Plastic DIP, 8mmx13.4mm TSOP(normal type).
Parametrics
BS62LV256SIP70 absolute maximum ratings: (1)VTERM Terminal Voltage with Respect to GND: -0.5(2) to 7.0 V; (2)TBIAS Temperature Under Bias: -40 to +125 OC; (3)TSTG Storage Temperature: -60 to +150 OC; (4)PT Power Dissipation: 1.0 W; (5)IOUT DC Output Current: 20 mA.
Features
BS62LV256SIP70 features: (1)Wide VCC operation voltage : 2.4V ~ 5.5V; (2)Very low power consumption; (3)High speed access time; (4)Automatic power down when chip is deselected; (5)Easy expansion with CE and OE options; (6)Three state outputs and TTL compatible; (7)Fully static operation; (8)Data retention supply voltage as low as 1.5V.
Diagrams
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