SAA7114H

video capture device, QFP, -0.5 to +4.6 V

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Price:: US $0.65~5.50 / piece [Get Latest Price]

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	US $0.65~5.50

PartNumber:: SAA7114H

Brand:: NXP Semiconductors - nxp | Pack: QFP | D/C: 05+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-07-12

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Part Number:SAA7114H
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Product Summary

The SAA7114H is a video capture device for applications at the image port of VGA controllers. The SAA7114H is a combination of a two-channel analog preprocessing circuit including source selection, anti-aliasing filter and ADC, an automatic clamp and gain control, a Clock Generation Circuit (CGC), a digital multi-standard decoder containing two-dimensional chrominance/luminance separation by an adaptive comb filter and a high performance scaler, including variable horizontal and vertical up and down scaling and a brightness, contrast and saturation control circuit.

Parametrics

SAA7114H absolute maximum ratings: (1)digital supply voltage: -0.5 to +4.6 V; (2)analog supply voltage: -0.5 to +4.6 V; (3)input voltage at analog inputs: -0.5 to VDDA + 0.5(1) V; (4)output voltage at analog output: -0.5 to VDDA + 0.5 V; (5)input voltage at digital inputs and outputs outputs: -0.5 to +5.5 V; (6)output voltage at digital outputs outputs active: -0.5 to VDDD + 0.5 V; (7)voltage difference between VSSAn and VSSDn: - 100 mV; (8)storage temperature: -65 to +150 ℃; (9)operating ambient temperature: 0 to 70 ℃; (10)operating ambient temperature under bias: -10 to +80 ℃; (11)electrostatic discharge all pins: -2000 to +2000 V.

Features

SAA7114H features: (1)Six analog inputs, internal analog source selectors, e.g. 6 ×CVBS or (2 × Y/C and 2 × CVBS) or (1 × Y/C and 4 × CVBS); (2)Two analog preprocessing channels in differential CMOS style inclusive built-in analog anti-alias filters; (3)Fully programmable static gain or Automatic Gain Control (AGC) for the selected CVBS or Y/C channel; (4)Automatic Clamp Control (ACC) for CVBS, Y and C; (5)Switchable white peak control; (6)Two 9-bit video CMOS Analog-to-Digital Converters (ADCs), digitized CVBS or Y/C signals are available on the expansion port; (7)On-chip line-locked clock generation according "ITU 601".